ATSAMV71 Microcontroller Notes

XDMAC Setup

There are a few aspects of the ATSAMV71 XDMAC which I found confusing with respect to using it to transfer to/from peripherals.

• When doing an RX operation, that is transferring data from a peripheral into memory, the source address must be set to the memory address of the peripheral's read data register. For example when using SPI, you would need to set the source address to SPI_RDR. I found this a bit confusing since you also have to specify the ID of the peripheral involved - so I imagined that would automatically let it know where to read/write from.

• Same on the TX side, the destination address must be set to the peripheral's transmit data register.

• When using the XDMAC in linked list mode:

1. Setup a global array of descriptors, with each descriptor aligned to 64 byte boundaries.
2. Set one of those descriptors up as desired for your channel. This is described pretty straightforward in the data sheet.
3. Note the similarity between the descriptor's microblock control word and the channel's XDMAC_CNDC. The NDDUP NDSUP bits in XDMAC_CNDC should most likely always be set if you are using anything except "View 0". Otherwise, the XDMAC will not copy the descriptor source and destination address into the channel's source and destination address, which is what you probably expect it to do.

• You can debug the linked list behavior somewhat by watching if the source and dest address get copied from the descriptor into XDMAC_CSAx/XDMAC_CDAx when you enable the channel. Setting the bit in XDMAC_GE is what turns the DMA channel loose to start running - hardware will pace it as data is ready if you're doing a peripheral transfer though.